Ravikumar, Siddharth (2025) AI-driven verification: Augmenting engineers in semiconductor EDA workflows. World Journal of Advanced Engineering Technology and Sciences, 15 (2). pp. 223-230. ISSN 2582-8266
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Abstract
The semiconductor industry faces mounting verification challenges as chip designs grow increasingly complex, with process nodes shrinking and design elements multiplying. AI-driven verification emerges as a transformative solution, creating a symbiosis between human expertise and machine intelligence rather than replacing engineers. This article explores how AI technologies augment verification workflows through predictive models for testbench generation, advanced anomaly detection systems, and collaborative human-machine partnerships. These innovations enable verification teams to navigate complexity with greater precision while reducing time-to-market pressures. Despite significant technical challenges and organizational hurdles, the trajectory toward AI-augmented verification is clear, requiring not just technological adaptation but a cultural shift in how organizations approach verification processes and engineer roles in the semiconductor ecosystem.
Item Type: | Article |
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Official URL: | https://doi.org/10.30574/wjaets.2025.15.2.0424 |
Uncontrolled Keywords: | AI-Augmented Verification; Semiconductor Design Automation; Testbench Generation; Anomaly Detection; Human-Machine Collaboration |
Depositing User: | Editor Engineering Section |
Date Deposited: | 04 Aug 2025 16:19 |
Related URLs: | |
URI: | https://eprint.scholarsrepository.com/id/eprint/3417 |