Breaking bottlenecks: CPU optimization through architectural and neuromorphic techniques

Sharma, M L and Sharma, Neelam and Kumar, Sunil and Diwan, Karan and Agarwal, Vibhore and Pathak, Ansh and Gupta, Shubham and Jain, Shreshth and Katara, Ram (2025) Breaking bottlenecks: CPU optimization through architectural and neuromorphic techniques. World Journal of Advanced Research and Reviews, 26 (2). pp. 190-204. ISSN 2581-9615

[thumbnail of WJARR-2025-1463.pdf] Article PDF
WJARR-2025-1463.pdf - Published Version
Available under License Creative Commons Attribution Non-commercial Share Alike.

Download ( 1MB)

Abstract

This research explores two different approaches to improving how computers process information efficiently. The first part uses the Gem5 simulator to test and compare three types of CPU designs—Timing Simple CPU, Minor CPU, and O3CPU—by running a basic program. We looked at how features like pipelining, caching, and branch prediction affect how fast the program runs and how efficiently the CPU works. The second part focuses on recognizing handwritten digits from the MNIST dataset using two types of AI models. One model is a traditional neural network (MLP) that runs on a standard computer setup (Von Neumann architecture), and the other is a spiking neural network (SNN) that runs on a neuromorphic system, which mimics how the human brain works. Overall, this study shows how both architectural improvements and brain-inspired computing can help solve performance and efficiency issues in modern computing systems.

Item Type: Article
Official URL: https://doi.org/10.30574/wjarr.2025.26.2.1463
Uncontrolled Keywords: CPU Optimization; Bottlenecks; Pipelining; Neuromorphic Computing; Spiking Neural Networks
Depositing User: Editor WJARR
Date Deposited: 25 Jul 2025 16:13
Related URLs:
URI: https://eprint.scholarsrepository.com/id/eprint/2486